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PI2122
Cool-ORing Series
12Amp Active ORing Solution With Load Disconnect
Description
The Cool-ORing PI2122 is a complete full-function Active ORing solution with a high-speed ORing MOSFET controller and a very low on-state resistance Dual MOSFETs designed for use in redundant power system architectures. The PI2122 Cool-ORing solution is offered in an extremely small, thermally enhanced LGA package and can be used in low voltage ( 5Vbus) high side Active ORing applications. The PI2122 enables extremely low power loss with fast dynamic response to fault conditions, critical for high availability systems. The PI2122 provide true bi-directional switch capabilities to protect against both power source and load fault conditions. A load short circuit detection feature allows user definition of a short condition enabling minimum duty cycle into a short. The PI2122 has the added benefit of being able to protect against output load fault conditions that may induce excessive forward current and device over-temperature by turning off the back-to-back MOSFETs with an auto-retry programmable off-time. The back-to-back MOSFETs drain-to-drain voltage is monitored to detect normal forward, excessive forward, light load and reverse current flow. The status is reported via an active low fault flag output. A temperature sensing function turns off the MOSFETs and indicates a fault if the controller junction temperature exceeds 145C.
Features
* * * * * * * * * Integrated High Performance 12A, 6m back-toback MOSFET Very-small, high density fully-optimized solution providing simple PCB layout. Fast Dynamic Response, with 140ns reverse & 170ns forward over-current turn-off delay time Accurate sensing capability to indicate system fault conditions Programmable under & over-voltage functions Over temperature shutdown Programmable over-current off time Programmable short circuit load detection Active low fault flag output
Applications
* * * * * N+1 Redundant Power Systems Servers & High End Computing High-side Active ORing High current Active ORing ( 5Vbus) MicroTCA
Package
* 5mm x 7mm 17-pin Thermally Enhanced LGA Package
Typical Application:
Figure 1: Figure 1: PI2122 High Side Active ORing
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PI2122 input current de-rating based on
Rev1.0
Page 1 of 19
Pin Description
Pin Number 1, 15, 16, 17, 22,23, 24, 25 2, 3, 4, 5, 18,19,20, 21 6 Pin Name D2 D1 SP Description Drain 2- Drain 2 of the internal Dual N-channel MOSFETs, connect to the output load. Drain 1- Drain 1 of the internal Dual N-channel MOSFETs, connect to the input voltage. Positive Sense Input & Clamp: Connect SP pin to the D1 pin. The polarity and magnitude of the voltage difference between SP and SN provides an indication of current flow direction through the MOSFETs. Fault State Output: This open collector output pulls low after the 40usec fault timer delay when a fault condition occurs. Fault logic inputs are VC Under-Voltage, input Under-Voltage, input Over-Voltage, Forward Over-Current, Reverse Current, Low Forward Current (or shorted switches) and Over-Temperature. Leave this pin open if unused. Short Circuit Detect Input: This input pin is for setting the load voltage where a short circuit level is defined and detected. To enable slow MOSFET turn-on mode, connect SCD to VC. Connect to load point for minimum threshold (0.335V) or use resistor divider to increase threshold. Grounding pin enables the fast MOSFET turn on mode. Over Current Duty Cycle Input: Connecting a capacitor ( 20nF) sets the gate off time once an over-current condition is detected. No capacitor on this pin will result in minimum off time; 40s. Pulling this input low will disable Gate drive. Controller Input Bias: Provides power to the controller. Connect a 1F capacitor between VC pin and ground. For high voltage applications connect a shunt resistor between VC and the input supply. Voltage on this pin is regulated to 15.5V in high voltage applications. Ground: This pin is ground for the control circuitry. Input Over Voltage Input: The OV pin detects when the input is greater than the Over-Voltage threshold resulting in a low Fault pin. OV "AND" a Forward Current condition turns the MOSFETs off. The input voltage OV threshold is programmable through an external resistor divider. Connect OV to GND to disable this function. Input Under Voltage Input: The UV pin detects when the input is less than the Under-Voltage threshold resulting in a low Fault pin. The input voltage UV threshold is programmable through an external resistor divider. During an UnderVoltage fault, the Gate is pulled low. Connect UV to VC to disable this function. Negative Sense Input & Clamp- Connect SN to D2 pin. The polarity and magnitude of the voltage difference between SP and SN provides an indication of current flow direction through the MOSFETs.
7
FT
8
SCD
9
OCT
10 11 12
VC GND OV
13
UV
14
SN
Package Pin-out
17 Pin LGA (5mm x 7mm) Top view
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Absolute Maximum Ratings
D1 to D2 (VD1-D2), D1 or D2 to GND Drain current (ID ) continuous Drain current (ID ) pulsed (100s) Thermal Resistance RJA(3) VC SP, SN, OV, OCT UV, SCD, FT GND Storage Temperature Operating Junction Temperature Lead Temperature (Soldering, 20 sec) ESD Rating (In accordance with JEDEC JESD 51-5) 7V 12A, 60A 56C/W -0.3 to 17.3V/40mA -0.3 to 8.0V/ 10mA -0.3 to 17.3V/ 10mA -0.3V/ 5A peak -65 oC to 150 oC -40oC to Thermal shutdown 250oC 2kV HBM
Electrical Specifications
Unless otherwise specified: -40C < TJ < 125C, VC =12V, CVc = 1uF, COCT = 2nF Parameter VC Supply Operating Supply Range(4) Quiescent Current Clamp Voltage VC Clamp Shunt Resistance VC Under-voltage Rising Threshold VC Under-voltage Falling Threshold VC Under-voltage Hysteresis Internal Dual N-Channel MOSFETs D1 to D2 Breakdown Voltage D1 to GND or D2 to GND Drain Current Continuous D1 to D2 On Resistance FAULT Under-Voltage Rising Threshold Under-Voltage Falling Threshold Under-Voltage Threshold Hysteresis Under-voltage Bias Current Over-voltage Rising Threshold Over-voltage Falling Threshold VUVR VUVF VUVHS IUV VOVR VOVF 440 -1 500 475 440 500 475 25 1 540 540 mV mV mV A mV mV ID1-D2 RDSon 6 VD1-D2 6 6 12 9 A m V In off state I=10uA; Tj=25C; Figure 12, page 11 In OFF state I=10uA; Tj=25C In ON state; Tj=25C In on state, ID=10A; Tj=25C VC-V(D2) 4.0V VVC-GND IVC VVC-CLM RVC VVCUVR VVCUVF VVCUVHS 4.0 4.3 4.15 150 15 4.5 3.7 15.5 13.2 4.2 16 7.5 4.5 V mA V V V mV No VC Limiting Resistors Normal Operating Conditions No Faults IVC=10mA Delta IVC=10mA Symbol Min Typ Max Units Conditions
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PI2122
Rev1.0
Page 3 of 19
Electrical Specifications
Unless otherwise specified: -40C < TJ < 125C, VC =12V, CVc = 1uF, COCT = 2nF Parameter Symbol Min Typ Max Units FAULT Continued Over-voltage Threshold Hysteresis Over-voltage Bias Current Fault Output Low Voltage Fault Output High Leakage Current Fault Delay Time Over Temperature Fault (1) Over Temperature Fault Hysteresis(1) Common mode input voltage VC to SN differential(1) Differential operating Input Voltage SP Input Bias Current SN Input Bias Current SN (SP) Voltage Reverse Comparator Off Threshold Reverse Comparator Hysteresis Reverse Turn-off Delay Forward Comparator On Threshold Forward Comparator Hysteresis Forward Over Current Comparator Threshold Forward Over Current Comparator Hysteresis Forward Over Current to Turn-off Delay Over Current Timer: OCT OCT Charging Source Current OCT Clamp Voltage OCT Threshold Voltage High OCT Threshold Voltage Low OCT OFF Time OCT MOSFET Disable OCT Discharge Current ISL VOCT-CL VOCT-Hi VOCT-Lo TOCT-OFF VOCT-Lo IOCTSK 5 10 2.0 -10 3.0 1.75 0.875 350 500 4.2 A V V V s mV mA VOCT = 1.25V No Fault SP=3.3V, SN=0V SP=3.3V, SN=0V FOC fault condition IOCT = -100uA VOCT =2.25V SP-SN=100mV VOV-HS IOV VFTL IFT-LC tFT-DEL TFT TFT-HS VCM VVC-SN VSP-SN ISP ISN VSN VRVS-TH VRVS-HS tF&RDLY VFWD-TH VFWD-HS VOC-TH VOC-HS tFOC-DLY 2 -5 83 -8 -10 2 -6 3 140 5 -3 90 -6 170 -0.1 3.5 -50 3.5 -37 5.5 -2 5 180 9 -2 97 -4 200 125 20 40 145 -10 5.5 -1 200 25 1 500 10 60 mV A mV A s C C V V mV A A V mV mV ns mV mV mV mV ns SP-SN VCM =1.25V VCM =1.25V SP=0V (SN=0) VCM =3.3V VCM =3.3V VSP-SN = 50mV step VCM =3.3V VCM =3.3V VCM =3.3V VCM =3.3V VSP-SN = 50mV step VCM =SP & SN w/respect to Gnd IFT=2mA, VC>4.5V VFT=14V Includes output glitch filter Conditions
DIFFERENTIAL AMPLIFIER AND COMPARATORS
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PI2122
Rev1.0
Page 4 of 19
Electrical Specifications
Unless otherwise specified: -40C < TJ < 125C, VC =12V, CVc = 1uF, COCT = 2nF Parameter Symbol Min Typ Max Units SCD SCD bias current SCD threshold voltage high SCD threshold voltage low SCD Hysteresis Iscd VThSCDR VThSCDF VThSCDR VThSCDF -1 300 340 310 25 50 75 1 380 A mV mV mV VSP-SN=20mV VSCD=0V VSP-SN=20mV Conditions
Note 1: These parameters are not production tested but are guaranteed by design, characterization and correlation with statistical process control. Note 2: Current sourced by a pin is reported with a negative sign. Note 3: Thermal resistance characterized on PI2122-EVAL1 evaluation board with 0 LFM airflow. Note 4: Refer to the Auxiliary Power Supply section in the Application Information section for details on the VC requirement to fully enhance the internal MOSFET.
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PI2122
Rev1.0
Page 5 of 19
Functional Description:
The PI2122 integrated Cool-ORing product takes advantage of two different technologies combining 2 3m on-state resistance (Rds(on)) N-channel MOSFETs with high density control circuitry. The product can function as an ideal ORing diode in the high-side of a redundant power system and a load disconnect switch, significantly reducing power dissipation and eliminating the need for heatsinking. The PI2122 has two internal MOSFETs in a back-toback configuration that has the ability to block current in both directions. This configuration protects the load and the input source, by turning off the MOSFETs, during Reverse Current, Forward Over-Current, Under-Voltage, Over-Voltage and Over-Temperature faults. Differential Amplifier: The PI2122 integrates a high-speed low offset voltage differential amplifier to sense the difference between the Sense Positive (SP) pin voltage and Sense Negative (SN) pin voltage with high resolution. The amplifier output is connected to three comparators: Reverse comparator, Forward comparator, and Forward over-current comparator. Reverse Current Comparator: RVS The reverse current comparator provides the most critical function in the controller, detecting negative voltage caused by reverse current. When the SN pin is 6mV higher than the SP pin, the reverse comparator will turn off the MOSFETs in typically 140ns. The reverse comparator has typically 3mV of hysteresis referenced to SP-SN. Forward Current Comparator: FWD The FWD comparator detects when a forward current condition exists and SP is 5mV (typical) positive with respect to SN. When SP-SN is less than 5mV it will indicate a fault condition on the FT pin during a light load while maintaining gate drive to the MOSFETs. The PI2122 will initiate a gate shutdown if the Forward "AND" the over-voltage (OV) condition are true. Over-Current Timer: OCT OCT off-time is set by the capacitor value connected to this pin as shown in Figure 4. The OCT block will control the off-time of the MOSFETs after a FOC fault condition has occurred. The equivalent block diagram is shown in Figure 3. As the Set input at the OCT timer goes high, Out will go low, pulling MOSFETs Gate low. At the same time a one shot of 40s discharges the OCT
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capacitor; then begins charging the capacitor again. Out and MOSFETs Gate stay low until the OCT pin reaches the OCT high threshold (VOCT-Hi), then Out goes high and the MOSFETs starts to turn on. As soon as the MOSFETs reaches sufficient gate voltage for Rds(on) the Clamp Detector asserts and turns MOSFETs on. If FOC is still low then the MOSFETs Gate will be pulled low and will start a new off-time cycle of the Over-Current timer.
Figure 3: OCT block and timing diagram Short Circuit Detect: SCD This comparator block input can be connected to the load directly or programmed to a higher voltage with a resistor divider. The function allows the user to define the (Hard Short) voltage level expected if a non-ideal short circuit occurs at the load. To prevent damage of the MOSFETs under this condition (VSCD<335mV) the gate charge current is increased by a factor of approximately 5 times resulting in a duty cycle that is approximately 5 times lower, as determined by the OCT function. This feature enables distinguishing between a faulted load versus powering capacitive and low resistive loads
PI2122 Rev1.0 Page 6 of 19
without entering the OCT mode. The pin can be grounded to provide a low duty cycle mode or pulled to VC for lower gate current to drive highly capacitive loads with resulting higher duty cycle mode under the fault condition. In either case if the resulting temperature rise of the MOSFET and controller reach thermal shutdown the thermal time constant of the package will set a low frequency burst like duty cycle condition and protect the MOSFETs.
OV: The Overvoltage (OV) input trip point can be programmed through an external resistive divider to monitor the input voltage. The OV comparator initiates a fault condition and pulls the FT pin low when OV rises above the Overvoltage Rising Threshold. The PI2122 will turn the MOSFETs off if the OV and the Forward Current conditions are both true. The low resistance redundant paths of an Active ORing system tend to force all the input sources to the same voltage making it difficult to identify the noncompliant source. By ANDing OV with the Forward Current Threshold the noncompliant source is identified and disconnected from the system. Over-Temperature Detection: The internal Over-Temperature block monitors the junction temperature of the controller. The OverTemperature threshold is set to 145C with -10C of hysteresis. When the controller temperature exceeds this threshold, the Over-Temperature circuit turns the MOSFETs off and initiates a fault condition and pulls the FT pin low. This function will protect the MOSFETs from thermal runaway conditions. Fault: The fault circuit output is an open collector with 40s delay to prevent any false triggering. The FT pin will be pulled low when any of the following faults occurs: * Reverse Current * Forward Over-Current "AND" clamp detector is cleared * Forward Low Current "AND" clamp detector is cleared * Over Temperature * Input Under-Voltage * Input Over-Voltage "AND" nominal Forward Current * VC pin Under-Voltage The Forward Current fault condition occurs when the MOSFETs gates are high but are not conducting a significant level of forward current or may indicate the MOSFETs are shorted either internally or externally (VD1-D2 < 5mV). A gate voltage detector prevents FOC or FWD from initiating a fault when the MOSFET is in an OFF condition. The gate to SN voltage has to reach sufficient voltage to establish the Rds(on) condition before these faults are detected.
Figure 4: OCT Off time vs. OCT capacitor value VC and Internal Voltage Regulator: The PI2122 has a separate input (VC) that provides power to the control circuitry and the internal gate driver. An internal regulator clamps the VC voltage to 15.5V. For high side applications, the VC input should be 4V above the bus voltage to properly enhance the internal N-channel MOSFET. The internal regulator circuit has a comparator to monitor VC voltage and initiates a FAULT condition when VC is lower than the VC Under-Voltage Threshold. UV: The Under Voltage (UV) input trip point can be programmed through an external resistive divider to monitor the input voltage. When UV falls below the Under-Voltage Falling Threshold, UV comparator initiates a fault condition and pulls the FT pin low and turns off the MOSFETs.
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PI2122
Rev1.0
Page 7 of 19
Figure 5: PI2122 Functional Block Diagram
Figure 6: Typical comparators thresholds and hysteresis values.
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PI2122
Rev1.0
Page 8 of 19
Figure 7: PI2122 Timing diagram for two ORing controllers application
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PI2122
Rev1.0
Page 9 of 19
Figure 8: PI2122 State diagram.
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PI2122
Rev1.0
Page 10 of 19
Typical Characteristics:
Figure 9: FOC comparator threshold vs. temperature. VCM: Common Mode Voltage.
Figure 10: Reverse comparator threshold vs. temperature. VCM: Common Mode Voltage.
Figure 11: Controller bias current vs. temperature.
Figure 12: Reverse condition turn-off delay time vs. temperature.
Figure 13: Internal MOSFETs on-state resistance vs. temperature.
Figure 14: Internal MOSFETs drain to source breakdown voltage vs. temperature.
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PI2122
Rev1.0
Page 11 of 19
Thermal Characteristics:
Figure 15: Junction Temperature vs. Input Current (0LFM)
Figure 16: Junction Temperature vs. Input Current (200LFM)
Figure 17: PI2122 mounted on PI2122-EVAL1 Thermal Image picture, Iout=12A, TA=25C, Air Flow=0LFM
Figure 18: PI2122 mounted on PI2122-EVAL1 Thermal Image picture, Iout=12A, TA=25C, Air Flow=200LFM
Figure 19: PI2122 input current de-rating based on maximum TJ=150C vs. ambient temperature
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Application Information:
The PI2122 is designed to replace ORing diodes and load disconnect switchs in high current redundant power architectures. Replacing a traditional diode with a PI2122 will result in significant power dissipation reduction as well as board space reduction, efficiency improvement, input power source and output protection plus additional protection features. This section describes in detail the procedure to follow when designing with the PI2122 Active ORing solution. A design example is presented for Active ORing with load disconnect. Fault Indication: FT output pin is an open collector and should be pulled up to the logic voltage or to the controller VC via a resistor (10K) Over-Current Timer: OCT Connect a capacitor, in the range of 1nF to 20nF to set the off time after over-current shutdown (see Figure 4). Short Circuit Detect: SCD Connect SCD pin to VC to avoid high inrush current into a capacitive load, or connect SCD to GND pin for fast turn on. The internal MOSFETs gate drive current has two levels based on the SCD voltage level. Auxiliary Power Supply (Vaux): Vaux is an independent power source required to supply power to the VC input. The Vaux voltage should be 4V higher than Vin (redundant power source output voltage) to fully enhance the internal MOSFETs. A bias resistor (Rbias) is required if the bias supply (Vaux) is higher than 15V. Rbias should be connected between the VC pin and Vaux to limit the current into the internal shunt regulator. Minimize the resistor value for low Vaux voltage levels to avoid a voltage drop that may reduce the VC voltage lower than required to drive the gate of the internal MOSFETs. Select the value of Rbias using the following equations:
VC Clamp : Controller clamp voltage, 15.5V
IC max
: Controller maximum bias current, use 4.2mA
Example: Vaux 20V to 30V
Rbias =
Vauxmin - VC clamp IC max
=
20V - 15.5V = 1.07 K 4.2mA
Pd Rbias =
(Vauxmax - VC clamp ) 2 Rbias
=
(30V - 15.5V ) 2 = 196mW 1.07 K
Internal N-Channel MOSFET BVdss: In an application when the MOSFETs are turned off due to a fault, the series parasitic elements in the circuit may contribute to the MOSFET being exposed to a voltage higher than its voltage rating. It is critical to follow best layout practice to minimize parasitic inductance in the PCB layout especially in the high current path. In Active ORing applications when one of the input power sources is shorted, a large reverse current is sourced from the circuit output through the MOSFETs. Depending on the output impedance of the system, the reverse current may reach over 60A in some conditions before the MOSFET is turned off. Such high current conditions will store energy even in a small parasitic element. For example: a 1nH parasitic inductance with 60A reverse current will generate 1.8J (1/2Li2). When the MOSFETs are turned off, the stored energy will be released and produce a high negative voltage ringing at D1. At the same time the energy stored at D2 of the internal MOSFETs will be released and produce a voltage higher than the load voltage. This event will create a high voltage difference between the drain and source of the MOSFET. To reduce the magnitude of the ringing voltage, add a ceramic capacitor very close to D1 that can react to the voltage ringing frequency and another capacitor close to D2. Recommended values for the ceramic capacitors are 1F; refer to C5 and C7 in Figure 24. Note: Since the two MOSFETs are connected in to backto-back configuration, the maximum breakdown voltage is BVdss of one MOSFET plus one diode forward voltage. OV and UV resistor selection: The UV and OV comparator inputs are used to monitor the input voltage and will indicate a fault condition when this voltage is out of range. The UV and OV pins can be configured in two different ways, either with a divider on each pin, or with a threeresistor divider to the same node, enabling the
PI2122 Rev1.0 Page 13 of 19
Rbias =
Vaux min - VC clamp IC max
Rbias maximum power dissipation:
Pd Rbias =
Where:
(Vauxmax - VC clamp ) 2 Rbias
Vauxmin : Vaux minimum voltage Vauxmax : Vaux maximum voltage
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elimination of one resistor. Under-Voltage is monitored by the UV pin input and Over-Voltage is monitored with the OV pin input. The Fault pin ( FT ) will indicate a fault (active low) when the UV pin is below the threshold or when the OV pin is above the threshold. The UV and OV thresholds are 0.50V typical with 25mV hysteresis and their input current is less than 1A. It is important to consider the maximum current that will flow in the resistor divider and maximum error due to UV and OV input current. Set the resistor current to 100A or higher to maintain 1% accuracy for UV and OV due to the bias current. The three-resistor voltage divider configuration for both UV and OV to monitor the same voltage node is shown in Figure 20:
V(UV)
I Ra
: UV voltage : Ra current.
Alternatively, a two-resistor voltage divider configuration can be used and is shown in (Figure 21).
Figure 21: Two-resistor divider configuration The UV resistor voltage divider can be obtained from the following equations:
Ra =
V (OVTH ) I Ra
R1UV =
V (UVTH ) I RUV
Set R1UV value based on system allowable current
I RUV 100A
V (UV ) R 2 UV = R1UV V (UV ) - 1 TH
Where: Figure 20: UV & OV three-resistor divider configuration.
Ra =
Set
V (OVTH ) I Ra
V (UVTH ) : UV threshold voltage : R1UV current I RUV
Ra value based on system allowable current
I Ra
R1UV =
I Ra Ra = V (OVTH )
V (OV ) Rb = Ra V (UV ) - 1 V (UV ) - 1 Rc = (Ra + Rb ) V TH
Where:
V (UVTH ) I RUV
Set R1OV value based on system allowable current
I RUV 100A
V (OV ) R 2 OV = R1OV V (OV ) - 1 TH
Where:
V (OVTH ) : OV threshold voltage : R1OV current I ROV
V (UVTH ) : UV threshold voltage V (OVTH ) : OV threshold voltage
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PI2122
Rev1.0
Page 14 of 19
Typical Application Example 1: Requirement: Redundant Bus Voltage = 5.0V Load Current = 8A (assume through each redundant path) Maximum Ambient Temperature = 70C, no air flow Auxiliary Voltage = 12V (10V to 14V) Solution: A single PI2122 for each redundant 5V power source should be used, configured as shown in the circuit schematic in Figure 22.
Connect an 18nF capacitor between the OCT pin and the GND pin to achieve the maximum off time after a forward over-current condition occurs. SCD pin: Connect the SCD pin to the GND pin for fast MOSFET enhancement. Program UV and OV to monitor input voltage: Program UV at 4.6V and OV at 5.4V Use the three-resistor divider configuration:
I Ra = 200A 500mV Ra = = 2.5k or 2.49k 1% 200A 5.4V Rb = 2.49k - 1 = 433 or 432 1% 4.6V 4.6V - 1 = 23.96k Rc = (2.49k + 432 ) 500mV
or 24.0k 1%
Power Dissipation and Junction Temperature: First use Figure 15 (Junction Temperature vs. Input Current) to find the final junction temperature for 8A load current at 70C ambient temperature. In Figure 15 (illustrated in Figure 23) draw a vertical line from 8A to intersect the 70C ambient temperature line. At the intersection draw a horizontal line towards the Y-axis (Junction Temperature). The Junction Temperature at full load current (8A) and 70C ambient is 110C, assuming the typical JA=56C/W. Rds(on) is 9.0m maximum at 25C and will increase as the Junction temperature increases. From Figure 11, at 110C Rds(on) will increase by ~29%, then
Figure 22: Two PI2122 in High Side ORing configuration Vaux: Since the Vaux voltage does not exceed the VC pin clamp voltage, connect the Vaux directly to the VC pin SP and SN pins: Connect each SP pin to the D1 pins and each SN pin to the D2 pins
FT pin:
Connect to the supervisor logic input and to the logic power supply via a 10K resistor. OCT pin:
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Figure 23: Example 1 final junction temperature at 8A/70C TA
PI2122 Rev1.0 Page 15 of 19
Rds(on) = 9m 1.29 = 11.61m maximum at 111C
Maximum power dissipation is:
Is.reverse =
Vth.reverse - 6mV = = -1.0 A Rds(on) 6m
Pdmax = Iin2 Rds(on) = (8A)2 11.61m = 743mW
Recalculate TJ:w
56C TJ max = 70C + (8A)2 11.61m = 111.6C W
Forward Over-Current threshold\: The following procedure demonstrates how to calculate typical forward current in the internal MOSFETs to generate a forward over-current fault condition and turn off the internal MOSFETs at room temperature (25C) and typical Rds(on):
Reverse Current Threshold: The following procedure demonstrates how to calculate the minimum required reverse current in the internal MOSFETs to generate a reverse fault condition and turn off the internal Misfits at room temperature (25C) and typical Rds(on):
I FOC =
V FOC -TH 90mV = = 15 A Rds(on) 6m
Figure 24: Plot of PI2122 response time to reverse current detection (Example 1, Figure 22)
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PI2122
Rev1.0
Page 16 of 19
Layout Recommendation:
Use the following general guidelines when designing printed circuit boards. An example of the typical land pattern for the PI2122 is shown in Figure 25: * * Make sure to have a solid ground (return) plane to reduce circuit parasitic. Connect all D1 pads together with a wide trace to reduce trace parasitics to accommodate the high current input, and also connect all D2 pads together with a wide trace to accommodate the high current output. Connect the SP pin to the D1 pins and connect the SN pin to D2 pins. Use 1oz of copper or thicker if possible to reduce trace resistance and reduce power dissipation. The VC bypass capacitor should be located as close as possible to the VC and GND pins. Place the PI2122 and bypass capacitor on the same layer of the board. The VC pin and CVC (shown as C2 in Figure 25) PCB trace should not contain any vias or connect to the ground plane close to the GND pin. Keep the power source very close to the D1 input pins, any parasitic inductance in the trace connecting the power source and D1 pins will have inductive kick when there is high current dv/dt in the trace when the MOSFETs turn off due to reverse current fault conditions. The inductive kick will produce a high voltage across the MOSFET. If it is not possible to connect the power source and D1 pins with a very short trace or common point, connect a capacitor (shown as C5 in figure 25), recommended value 1F, close to the D1 pins and return (ground). Also for the same reason use C7 in figure 25 at the output.
* *
*
*
Figure 25: PI2122 layout recommendation
Figure 26: PI2122 Mounted on PI2122-EVAL1 Please visit www.picorpower.com for information on PI2122-EVAL1
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PI2122
Rev1.0
Page 17 of 19
Package Drawing
Thermal Resistance Ratings Parameter Maximum Junction-to-Ambient (2) Maximum Junction-to-PCB
Symbol
JA JC
Typical 56 14
Unit C/W C/W
Note 2: In accordance with JEDEC JESD 51-5
Ordering Information
Part Number PI2122-00-LGIZ Package 5x7mm 17-pin LGA Temperature range -40C to 125C Transport Media T&R
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PI2122
Rev1.0
Page 18 of 19
Warranty
Vicor products are guaranteed for two years from date of shipment against defects in material or workmanship when in normal use and service. This warranty does not extend to products subjected to misuse, accident, or improper application or maintenance. Vicor shall not be liable for collateral or consequential damage. This warranty is extended to the original purchaser only. EXCEPT FOR THE FOREGOING EXPRESS WARRANTY, VICOR MAKES NO WARRANTY, EXPRESS OR LIMITED, INCLUDING, BUT NOT LIMITED TO, THE WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Vicor will repair or replace defective products in accordance with its own best judgment. For service under this warranty, the buyer must contact Vicor to obtain a Return Material Authorization (RMA) number and shipping instructions. Products returned without prior authorization will be returned to the buyer. The buyer will pay all charges incurred in returning the product to the factory. Vicor will pay all reshipment charges if the product was defective within the terms of this warranty. Information published by Vicor has been carefully checked and is believed to be accurate; however, no responsibility is assumed for inaccuracies. Vicor reserves the right to make changes to any products without further notice to improve reliability, function, or design. Vicor does not assume any liability arising out of the application or use of any product or circuit; neither does it convey any license under its patent rights nor the rights of others. Vicor general policy does not recommend the use of its components in life support applications wherein a failure or malfunction may directly threaten life or injury. Per Vicor Terms and Conditions of Sale, the user of Vicor components in life support applications assumes all risks of such use and indemnifies Vicor against all damages.
Vicor's comprehensive line of power solutions includes high density AC-DC and DC-DC modules and accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom power systems.
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor components are not designed to be used in applications, such as life support systems, wherein a failure or malfunction could result in injury or death. All sales are subject to Vicor's Terms and Conditions of Sale, which are available upon request.
Specifications are subject to change without notice.
Vicor Corporation 25 Frontage Road Andover, MA 01810 USA
Picor Corporation 51 Industrial Drive North Smithfield, RI 02896 USA
Customer Service: custserv@vicorpower.com Technical Support: apps@vicorpower.com Tel: 800-735-6200 Fax: 978-475-6715
Picor Corporation * picorpower.com
PI2122
Rev1.0
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Price & Availability of PI2122

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